NCR Corporation Computer Programming

October 11, 2019

NCR Corporation Computer Science Questions and NCR Domain Test Papers with Answers:

NCR Corporation Computer Science Questions and Answers are  provided here .Level of computer science questions are quite high. CoCubes Computer Fundamentals Questions are a little tricky and need a lot of practicing thus studying from our website should help you a lot.

NCR Computer programming Questions ad answers
Number of Questions15
Level of  DifficultyHigh
Mode ConductedOnline

NCR Corporation Computer Science Prvious year  questions  Part -I

NCR Corporation Computer science topics include :

NCR Corporation Computer Fundamentals Questions Part-II

[table id=945 /]

1. Suppose that in a C program snippet, followings statements are used.

i) sizeof(int);
ii) sizeof(int*);
iii) sizeof(int**);

Assuming size of pointer is 4 bytes and size of int is also 4 bytes, pick the most correct answer from the given options.

Only i) would compile successfully and it would return size as 4

Only i) would compile successfully and it would return size as 4

24.02%

i), ii) and iii) would compile successfully and size of each would be same i.e. 4

i), ii) and iii) would compile successfully and size of each would be same i.e. 4

41.73%

i), ii) and iii) would compile successfully but the size of each would be different and would be decided at run time.

i), ii) and iii) would compile successfully but the size of each would be different and would be decided at run time.

21.65%

ii) and iii) would result in compile error but i) would compile and result in size as 4.

ii) and iii) would result in compile error but i) would compile and result in size as 4.

12.6%

Explanation:
Size of all pointer types is same. And whether it is a 'pointer to char' or 'pointer to int' or 'pointer to pointer to int', the size always remain same. That's why all i), ii) and iii) would compile successfully and would result in same size value of 4.

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2. Assume int is 4 bytes, char is 1 byte and float is 4 bytes. Also, assume that pointer size is 4 bytes (i.e. typical case)

char *pChar;
int *pInt;
float *pFloat;
sizeof(pChar);
sizeof(pInt);
sizeof(pFloat);
What’s the size returned for each of sizeof() operator?

444

444

39.17%

144

144

36.25%

148

148

7.5%

None of the above

None of the above

17.08%

Explanation:
Irrespective of the type of pointer, the size for a pointer is always same. So whether it’s pointer to char or pointer to float, the size of any pointer would be same. Even size of a pointer to user defined data type (e.g. struct) is also would be same.

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3. In an IPv4 datagram, the M bit is 0, the value of HLEN is 10, the value of total length is 400 and the fragment offset value is 300. The position of the datagram, the sequence numbers of the first and the last bytes of the payload, respectively are

Last fragment, 2400 and 2789

Last fragment, 2400 and 2789

20.77%

First fragment, 2400 and 2759

First fragment, 2400 and 2759

23.85%

Last fragment, 2400 and 2759

Last fragment, 2400 and 2759

46.15%

Middle fragment, 300 and 689

Middle fragment, 300 and 689

9.23%

Explanation:
M = 0 indicates that this packet is the last packet among all fragments of original packet. So the answer is either A or C. It is given that HLEN field is 10. Header length is number of 32 bit words. So header length = 10 * 4 = 40 Also, given that total length = 400. Total length indicates total length of the packet including header. So, packet length excluding header = 400 - 40 = 360 Last byte address = 2400 + 360 - 1 = 2759 (Because numbering starts from 0)

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4. Which of the following are used to generate a message digest by the network security protocols?

(P) RSA 
(Q) SHA-1 
(R) DES 
(S) MD5

P and R only

P and R only

34.38%

Q and R only

Q and R only

17.5%

Q and S only

Q and S only

40.63%

R and S only

R and S only

7.5%

Explanation:
  • RSA – It is an algorithm used to encrypt and decrypt messages.
  • SHA 1 – Secure Hash Algorithm 1, or SHA 1 is a cryptographic hash function. It produces a 160 bit (20 byte) hash value (message digest).
  • DES – Data Encryption Standard, or DES is a symmetric key algorithm for encryption of electronic data.
  • MD5 – Message Digest 5, or MD5 is a widely used cryptographic hash function that produces a 128 bit hash value (message digest).

Q and S i.e SHA 1 and MD5 are used to generate a message digest by the network security protocols. So, C is the correct choice.

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5. Consider the following sequence of micro-operations.

MBR ← PC MAR ← X PC ← Y Memory ← MBR
Which one of the following is a possible operation performed by this sequence?

Instruction fetch

Instruction fetch

34.85%

Operand fetch

Operand fetch

19.7%

Conditional branch

Conditional branch

17.42%

Initiation of interrupt service

Initiation of interrupt service

28.03%

Explanation:
MBR - Memory Buffer Register ( that stores the data being transferred to and from the immediate access store) MAR - Memory Address Register ( that holds the memory location of data that needs to be accessed.) PC - Program Counter ( It contains the address of the instruction being executed at the current time ) The 1st instruction places the value of PC into MBR The 2nd instruction places an address X into MAR. The 3rd instruction places an address Y into PC. The 4th instruction places the value of MBR ( which was the old PC value) into Memory. Now it can be seen from the 1st and the 4th instructions, that the control flow was not sequential and the value of PC was stored in the memory, so that the control can again come back to the address where it left the execution. This behavior is seen in the case of interrupt handling. And here X can be the address of the location in the memory which contains the beginning address of Interrupt service routine. And Y can be the beginning address of Interrupt service routine. In case of conditional branch (as for option C ) only PC is updated with the target address and there is no need to store the old PC value into the memory. And in the case of Instruction fetch and operand fetch ( as for option A and B), PC value is not stored anywhere else. Hence option D.

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6. A RAM chip has a capacity of 1024 words of 8 bits each (1K × 8). The number of 2 × 4 decoders with enable line needed to construct a 16K × 16 RAM from 1K × 8 RAM is

4

4

36%

5

5

40%

6

6

19%

7

7

5%

Explanation:

RAM chip size = 1k ×8[1024 words of 8 bits each]

RAM to construct =16k ×16

Number of chips required = (16k x 16)/ ( 1k x 8) = (16 x 2) [16 chips vertically with each having 2 chips horizontally]

So to select one chip out of 16 vertical chips, we need 4 x 16 decoder.

Available decoder is 2 x 4 decoder To be constructed is 4 x 16 decoder Hence 4 + 1 = 5 decoders are required.

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7. The atomic fetch-and-set x, y instruction unconditionally sets the memory location x to 1 and fetches the old value of x in y without allowing any intervening access to the memory location x. consider the following implementation of P and V functions on a binary semaphore .

void P (binary_semaphore *s) {
  unsigned y;
  unsigned *x = &(s->value);
  do {
     fetch-and-set x, y;
  } while (y);
}

void V (binary_semaphore *s) {
  S->value = 0;
}
Which one of the following is true?

The implementation may not work if context switching is disabled in P.

The implementation may not work if context switching is disabled in P.

35.8%

Instead of using fetch-and-set, a pair of normal load/store can be used

Instead of using fetch-and-set, a pair of normal load/store can be used

40.74%

The implementation of V is wrong

The implementation of V is wrong

9.88%

The code does not implement a binary semaphore

The code does not implement a binary semaphore

13.58%

Explanation:
Let us talk about the operation P(). It stores the value of s in x, then it fetches the old value of x, stores it in y and sets x as 1. The while loop of a process will continue forever if some other process doesn't execute V() and sets the value of s as 0. If context switching is disabled in P, the while loop will run forever as no other process will be able to execute V().

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8. Which of the following concurrency control protocols ensure both conflict serialzability and freedom from deadlock? I. 2-phase locking II. Time-stamp ordering

I only

I only

17.12%

II only

II only

36.94%

Both I and II

Both I and II

39.64%

Neither I nor II

Neither I nor II

6.31%

Explanation:

2 Phase Locking (2PL) is a concurrency control method that guarantees serializability. The protocol utilizes locks, applied by a transaction to data, which may block (interpreted as signals to stop) other transactions from accessing the same data during the transaction’s life. 2PL may be lead to deadlocks that result from the mutual blocking of two or more transactions. See the following situation, neither T3 nor T4 can make progress.

Timestamp-based concurrency control algorithm is a non-lock concurrency control method. In Timestamp based method, deadlock cannot occur as no transaction ever waits.

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9. Consider the transactions T1, T2, and T3 and the schedules S1 and S2 given below.

T1: r1(X); r1(Z); w1(X); w1(Z)
T2: r2(Y); r2(Z); w2(Z)
T3: r3(Y); r3(X); w3(Y)
S1: r1(X); r3(Y); r3(X); r2(Y); r2(Z);
    w3(Y); w2(Z); r1(Z); w1(X); w1(Z)
S2: r1(X); r3(Y); r2(Y); r3(X); r1(Z);
    r2(Z); w3(Y); w1(X); w2(Z); w1(Z) 
Which one of the following statements about the schedules is TRUE?

Only S1 is conflict-serializable.

Only S1 is conflict-serializable.

26.14%

Only S2 is conflict-serializable

Only S2 is conflict-serializable

23.86%

Both S1 and S2 are conflict-serializable

Both S1 and S2 are conflict-serializable

39.77%

Neither S1 nor S2 is conflict-serializable.

Neither S1 nor S2 is conflict-serializable.

10.23%

Question 6 Explanation:
For conflict serializability of a schedule( which gives same effect as a serial schedule ) we should check for conflict operations, which are Read-Write, Write-Read and Write-Write between each pair of transactions, and based on those conflicts we make a precedence graph, if the graph contains a cycle, it's not a conflict serializable schedule. To make a precedence graph: if Read(X) in Ti followed by Write(X) in Tj ( hence a conflict ), then we draw an edge from Ti to Tj ( Ti -> Tj) If we make a precedence graph for S1 and S2 , we would get directed edges for S1 as T2->T1, T2->T3, T3->T1, and for S2 as T2->T1, T2->T3, T3->T1, T1->T2. In S1 there is no cycle, but S2 has a cycle. Hence only S1 is conflict serializable. Note : The serial order for S1 is T2 -> T3 -> T1.

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10. Consider the following transaction involving two bank accounts x and y.

read(x);  x := x – 50;  write(x);  read(y);  y := y + 50;  write(y) 
The constraint that the sum of the accounts x and y should remain constant is that of

Atomicity

Atomicity

23.53%

Consistency

Consistency

58.82%

Isolation

Isolation

12.61%

Durability

Durability

5.04%

Explanation:
Consistency in database systems refers to the requirement that any given database transaction must only change affected data in allowed ways, that is sum of x and y must not change.

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NCR Corporation Computer Science based FAQ's

Ques.What is the difficulty level for Computer Science section ?

Answer:  The difficulty level of Computer science section is quite high . You have a good command in coding and any language like Java , C++ .

Ques. Is there any negative marking for NCR Corporation Computer Science ?

Answer:  Yes , there is a negative marking of 0.25 marks in the computer science section.